The inventive concept relates to a flip-flop, and more particularly, to a multi-bit flip-flop.
A multi-bit flip-flop, in which two or more flip-flops are implemented with a single cell, has been proposed according to the high degree of integration of semiconductor chips. A design for testability (DFT) has been widely used to maintain the quality of semiconductor chips and improve test efficiency, and a scan test technique of DFT techniques is valuable.